INTEGRATED CIRCUITS INC. afrc616. Recording Controller. Data sheet APLUS INTEGRATED CIRCUITS INC.

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Transcrição:

Recording Controller Data sheet APLUS Address: 3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei, Taiwan 115, R.O.C. TEL: 886-2-2782-9266 FAX: 886-2-2782-9255 WEBSITE: http://www.aplusinc.com.tw Technology E-mail: service@aplusinc.com.tw Sales E-mail: sales@aplusinc.com.tw Ver. 1.0.1 1/17

FEATURES Powerful Power Management Unit Operating voltage range: 3.0V ~ 6.5V All function off standby Current: 1uA (Typ.) Support power-down mode for power saving Build-in LDO for core and external SPI flash: 2.35V ~ 2.75V Programmable I/Os Support 27 GPIOs Programmable high output voltage: VCORE or VDD 2 hardware SPI interface Powerful 16-Bits Digital Audio Processor. 8bits-MCU with 16bits-DSP engine as 16-bits audio processor Selectable PWM or DAC voice output with 16-bits resolution Support software ADPCM and u-law and PCM compression library Support 6KHz ~ 48KHz sample rate Oscillator Support internal ROSC, external ROSC external crystal mode ±1% deviation for internal ROSC ±1% deviation for external ROSC with on-system calibration procedure Memory Build-in 12K bytes flash structure program memory with 20 000 times erase/program Build-in 8K bytes SRAM Support external SPI flash for voice data storage Support software memory management library Single Chip, High Quality Audio/Voice Recording & Playback Solution Minimum External Components User Friendly, Easy to Use Operation Programming & Development Systems Not Required Nonvolatile Flash Memory Technology No Battery Backup Required External Reset pin. Watch dog timer (WDT) High Quality Analog to Digital, DAC and PWM module Resolution up to 16-bits Built-in Audio-Recording Microphone Amplifier No External OPAMP or BJT Required Software simulator AGC Ver. 1.0.1 2/17

Configurable analog interface Differential-ended MIC pre-amp for Low Noise High Quality Line Receiver Package : LQFP44 SOP28 DICE Voice Duration (seconds) Table with External SPI Flash (4M~128M) 1. + SPI FLASH by 4 bit ADPCM S. R. (Hz) SPI-4M SPI-8M SPI-16M SPI-32M SPI-64M SPI-128M SR-24K 42 85 170 341 682 1365 SR-12K 85 170 341 682 1365 2730 SR-8K 128 256 512 1024 2048 4096 2. + SPI FLASH by 8 bit u-low S.R. (Hz) SPI-4M SPI-8M SPI-16M SPI-32M SPI-64M SPI-128M SR-24K 21 42 85 170 341 682 SR-12K 42 85 170 341 682 1365 SR-8K 64 128 256 512 1024 2048 3. + SPI FLASH by 16 bit PCM S.R. (Hz) SPI-4M SPI-8M SPI-16M SPI-32M SPI-64M SPI-128M SR-24K 10 21 42 85 170 341 SR-12K 21 42 85 170 341 682 SR-8K 32 64 128 256 512 1024 Rosc 47K ohm 60K 76K 95K 115K 147K 189K S.R. 12K 11K 10K 9K 8K 7K 6K Ps : the Rosc default [ 47K ] ohm Ver. 1.0.1 3/17

DESCRIPTION The is the powerful audio processor along with high performance audio analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). The is a fully integrated solution offering high performance and unparalleled integration with analog input, digital processing and analog output functionality. The incorporates all the functionality required to perform demanding audio/voice applications. High quality audio/voice systems with lower bill-of-material costs can be implemented with the because of its integrated analog data converters and full suite of quality-enhancing features such as sample-rate convertor. PIN CONFIGURATION Ver. 1.0.1 4/17

BLOCK DIAGRAM Figure 1. Block Diagram Ver. 1.0.1 5/17

PIN DESCRIPTION Pin Names LQFP44 Pin No SOP28 VDDP 2 1 TYPE Description Positive power supply for Internal PWM block. VDD 11 X Positive power supply for GPIOs. VDDA 23 8 Positive power supply for Internal analog block. VDDL 33 17 Positive power supply for Internal LDO. VSSA 22 26 Power ground for Internal PWM block. VSSL 34 26 Power ground for Internal LDO. VSSP 43 26 Power ground for Internal analog block. VSS 12 26 Power ground. V25 35 18 Internal LDO output for core logical MPV25 10 X VREF 24 9 Internal LDO output for SRAM & external SPI flash. Reference voltage for Internal LDO and analog block. VCM 25 10 Common mode voltage RSTB 37 20 IN Chip reset, low active. SRSTB 38 21 IN VOUT1 1 28 OUT VOUT2 /COUT 44 27 OUT PC0/TCLK 41 24 PC1/TDAT 42 25 I/O System reset, only use in program (Engineering) mode, pull-down a resistor to the VSSL. GPIO or PWM output to drive speaker directly. GPIO, PWM output to drive speaker directly or DAC output. GPIO or system program interface. PC2 3 2 PC3 4 3 I/O GPIO. PD0/ROSC 36 19 I/O GPIO or external oscillate resistor. PD1/OSCI 39 22 I/O PD2/OSCO 40 23 I/O GPIO or external crystal. Ver. 1.0.1 6/17

Pin Names LQFP44 Pin No SOP28 TYPE Description PD3 32 X I/O GPIO PB0 5 X I/O GPIO PB1 6 X I/O GPIO PB2 7 X I/O GPIO PB3 8 X I/O GPIO PE0 13 4 I/O PE1 14 5 I/O PE2 15 6 I/O PE3 16 7 I/O SOP28 : CS pin of SPI FLASH LQFP44 : GPIO SOP28 --- DIO pin of SPI FLASH LQFP44--- DIO pin of SPI FLASH SOP28--- SCK pin of SPI FLASH LQFP44--- SCK pin of SPI FLASH SOP28 --- DO pin of SPI FLASH LQFP44 --- GPIO PF0 17 X I/O LQFP44 --- GPIO PF1 18 X I/O GPIO PF2 19 X I/O GPIO PF3 20 X I/O LQFP44--- DO pin of SPI FLASH PX0 28 13 IN [ Mic- ] --- Microphone differential input. PX1 27 12 I/O GPIO PX2 26 11 I/O GPIO PX3 21 X I/O LQFP44--- /CS pin of SPI FLASH PY0 29 14 IN [ Mic+ ] ---Microphone differential input. PY1 30 15 OUT MICG --- Microphone ground PY2 31 16 I/O GPIO PY3 9 X I/O GPIO Ver. 1.0.1 7/17

VOICE OUTPUT The series support 2 voice output modes, PWM and DAC. The PWM mode use VOUT1 and VOUT2 pin to drive speaker directly without external components to save cost. The DAC mode use VOUT2 pin to output current signal. User can use the signal to drive audio amplifier or mix with other components in their applications to provide larger voice volume. The following fig. show circuit for different output methods: PWM, DAC, DAC with transistor. Ver. 1.0.1 8/17

RESET The can enter standby mode when RSTB pin drive to low. During chip in the standby mode, the current consumption is reduced to ISB and any operation will be stopped, user also can not execute any new operate in this mode. The standby mode will continue until RSTB pin goes to high, chip will be started to initial, and playback beep tone to indicate enter idle mode. User can get less current consumption by control RSTB pin especially in some application which concern standby current. BUSY The MICG pin will be drove to low during the message record or playback, and drove to high during idle or standby, user can detect MICG status to know chip is busy or not. Please note it is limited for MICG pin driving current. Reference to IOH and IOL in section DC CHARACTERISTICS. If MICG pin is over loading from external circuit, it will cause noise in microphone circuit. Ver. 1.0.1 9/17

Below is a typical application. We add one LED to indicate IC record and playback status. We use one Resistor to limit current. And suggest R> 470Ω ABSOLUTE MAXIMUM RATINGS Symbol Rating Unit VDD VSS -0.3 ~ +10.0 V VIN VSS-0.3 < VIN < VDD+0.3 V VOUT VSS < VOUT < VDD V T(Operating) -40 ~ +85 T(Junction) -40 ~ +125 T(Storage) -40 ~ +125 Ver. 1.0.1 10/17

DC CHARACTERISTICS Symbol Parameter Min. Typ. Max. Unit Conditions VDD Operating Voltage 3.0 6.5 V VLDO Internal LDO Output Voltage 2.35 2.75 V VREF Reference Voltage 1.20 1.30 V ISB Standby Current 1 µa All function off IPDN Power-Down Current 15 20 µa IOP(IDLE) Operating Current (Idle) 20 ma VDD = 5V IOP(REC) Operating Current (Record) 35 ma VDD = 5V IOP(PLAY) Operating Current (Playback) 25 ma VDD = 5V VIH "H" Input Voltage 2.5 V VIL "L" Input Voltage 0.6 V IVOUT VOUT Current 185 ma IOH O/P High Current 8 ma VDD = 5V / VOH=4.5V IOL O/P Low Current 14 ma VDD = 5V / VOH=0.5V RNPIO Input pin pull-down resistance 300 KΩ External floating or drive low. 1 MΩ External drive high. RUPIO Input pin pull-up resistance 4.7 KΩ Fs/Fs Frequency stability 1.5 % VDD = 5V ± 1.0V Fc/Fc Chip to chip Frequency Variation 1.0 % Also apply to lot to lot variation. Ver. 1.0.1 11/17

APPLICATION CIRCUIT : for LQFP44 Ver. 1.0.1 12/17

For SOP28 : Ver. 1.0.1 13/17

PACKAGE INFORMATION : LQFP44 Package : Ver. 1.0.1 14/17

28Pin 300mil SOP Package : Ver. 1.0.1 15/17

BONDING PAD DIAGRAMS : Ver. 1.0.1 16/17

HISTORY Ver. 1.0 (2016/07/01) - Original version data sheet for. Ver. 1.0.1 17/17